Sorry, I guess the actuall patch might be of use. - Nick Lopez kimo_sabe@atdot.org -- "One World, One Web, One Program" - Microsoft Promotional Ad "Ein Volk, Ein Reich, Ein Fuhrer" - Adolf Hitler
diff -ru etherboot-4.6.0/src/NIC etherboot-4.6.0-mine/src/NIC --- etherboot-4.6.0/src/NIC Tue Apr 25 05:31:42 2000 +++ etherboot-4.6.0-mine/src/NIC Thu Apr 27 00:08:36 2000 @@ -80,6 +80,8 @@ lc82c168 tulip 0x11ad,0x0002 # Tulip clones based on the Macronix 987x5 mx987x5 tulip 0x10d9,0x0553 +# Davicom DM9102 +davicom tulip 0x1282,0x9102 # NE1000/2000 and clones (ISA) ne ns8390 # Novell NE2100 (Lance based, also works on NE1500) diff -ru etherboot-4.6.0/src/config.c etherboot-4.6.0-mine/src/config.c --- etherboot-4.6.0/src/config.c Tue Apr 25 05:30:14 2000 +++ etherboot-4.6.0-mine/src/config.c Thu Apr 27 00:10:41 2000 @@ -100,6 +100,8 @@ "LinkSys LNE100TX", 0, 0, 0}, { PCI_VENDOR_ID_LINKSYS, PCI_DEVICE_ID_DEC_TULIP, "Netgear FA310TX", 0, 0, 0}, + { PCI_VENDOR_ID_DAVICOM, PCI_DEVICE_ID_DM9102, + "Davicom 9102", 0, 0, 0}, #endif #ifdef INCLUDE_VIA_RHINE { PCI_VENDOR_ID_VIATEC, PCI_DEVICE_ID_VIA_RHINE_I, diff -ru etherboot-4.6.0/src/pci.h etherboot-4.6.0-mine/src/pci.h --- etherboot-4.6.0/src/pci.h Tue Apr 25 05:30:44 2000 +++ etherboot-4.6.0-mine/src/pci.h Wed Apr 26 23:00:13 2000 @@ -134,6 +134,8 @@ #define PCI_VENDOR_ID_VIATEC 0x1106 #define PCI_DEVICE_ID_VIA_RHINE_I 0x3043 #define PCI_DEVICE_ID_VIA_86C100A 0x6100 +#define PCI_VENDOR_ID_DAVICOM 0x1282 +#define PCI_DEVICE_ID_DM9102 0x9102 struct pci_device { unsigned short vendor, dev_id; diff -ru etherboot-4.6.0/src/tulip.c etherboot-4.6.0-mine/src/tulip.c --- etherboot-4.6.0/src/tulip.c Tue Apr 25 05:31:30 2000 +++ etherboot-4.6.0-mine/src/tulip.c Thu Apr 27 02:48:07 2000 @@ -12,6 +12,7 @@ model FA310X, based on the LC82C168 chip is supported. The TRENDnet TE100-PCIA NIC which uses a genuine Intel 21143-PD chipset is supported. + Also, Davicom DM9102's. Documentation and source code used: Source for Etherboot driver at @@ -39,6 +40,7 @@ /*********************************************************************/ /* + 47 Apr njl 0.75b8 29 Feb 2000 mdc 0.75b7 Increased reset delay to 3 seconds because Macronix cards seem to need more reset time before card comes back to a usable state. @@ -506,6 +508,11 @@ csr6 |= (DEC_21142_CSR6_HBD | DEC_21142_CSR6_PS); csr6 &= ~(DEC_21142_CSR6_TTM); } + } else if (vendor == PCI_VENDOR_ID_DAVICOM && dev_id == PCI_DEVICE_ID_DM9102){ + /* setup CR12 */ + outl(0x180, ioaddr + CSR12); /* Let bit 7 output port */ + outl(0x80, ioaddr + CSR12); /* RESET DM9102 phyxcer */ + outl(0x0, ioaddr + CSR12); /* Clear RESET signal */ } /* set the chip's operating mode */
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